There's an in-depth video that compares the performance of Quake's software renderer on the Pentium MMX versus the AMD K6 at the micro-architecture level: https://www.youtube.com/watch?v=DWVhIvZlytc
The most interesting insight in there is how the former manages to outperform the latter in this specific case due to a pipeline quirk in the FDIV instruction, despite the fact it is a previous generation, in-order design vs a next generation, out-of-order design.
From the same period, Ars wrote an excellent non-technical introduction to the whole generation of architectures – "RISC vs CISC: the Post-RISC Era". [1]
I could tell. It loaded nearly instantly and rendered as fast it was loaded. (Also, I read that article on one beautiful afternoon in the summer of 2008.)
The P6 is the direct ancestor of the Intel Core line of CPUs, which is on its 14th and 15th generation on desktop and mobile respectively and presumably will see the 16th generation release later this year.
(Screw the Intel Core(Ultra)<X> rebranding.)
So in that sense, this is a very interesting bit of history that's still relevant today.
Yeah, nearly 30 years of continual incremental improvements to the same P6 microarchitecture.
Intel actually went back to the P6 µarch after Netburst (Pentium 4) failed to meet expectations. Fortunately, they had continue to improve P6 as a laptop focused processor (Pentium M). Netburst is a very interesting µarch, with a lot of interesting innovations. Some of those ideas (like hyperthreadding, the single physical register file and a simplified uop cache) eventually made their way back to the P6 uarch.
And it's not just historically relevant to Intel. Other CPU vendors started copying the basic layout of the P6 and as now days the high-level views of AMD's Zen µarch and all high-performance AArch64 µarches look remarkably similar to the P6 and its decedents.
The 'News' bit of this site's name connotes that a majority of articles cover current events. When historical information is presented, the best practice is to cite the year parenthetically in the post's title. If this practice were followed more consistently, people less interested in purely historical content could skip over it more easily. HN could even grab the 'last updated' metadata from the linked page programmatically.
> [The Pentium II] was the first processor (I knew of) to have completely documented post-RISC features such as dynamic execution, out of order execution and retirement. (PA-RISC predated it as far as implementing the technology, however; I am suspicious that HP told Intel to either work with them on Merced, or be sued up the wazoo.)
With some hindsight available now, does anybody know if there is something to this suspicion? Intel being far less enthusiastic about Itanium than HP did look weird to me. Then again, that was years later when Itanium was actually available and nobody except HP showed any interest in using them.
According to Wikipedia, the CDC 6400 had some OoO execution in 1964, and the IBM 360 model 91 had register renaming and full OoO in 1966, and IBM POWER1 had OoO in 1990.
My first PC had a Cyrix "P166+" running at 133MHz. That CPU used almost twice the power of a Pentium running at the same clock speed, yet many PC vendors put the same fans on both.
As a result, under heavy load, my PC would crash rather often, leading me to curse audibly until somebody pointed out the power vs fan issue to me and recommended I get a bigger fan. So I did. After that, it ran pretty stable.
Cyrix made a trade of in that CPU, the integer performance was far better than that of a Pentium at the same clock speed, the floating point performance lagged far behind. I got that machine in the summer of 1996, and then all my friends started playing Quake, which made me sad. Playing Quake (let alone Quake II) on that machine was more like staring at a slideshow. A 3dfx card was way outside my budget, unfortunately.
Yeah. Super Socket 7 was a great platform. Plugging cpu's from different manufacturers into a common socket, a choice of 3rd party chipsets, wide range of cpu speeds / TDP / price, and good longevity.
These days sockets are shortlived & each manufacturer has their own. Or cpu's (and even RAM) soldered directly onto a board so you can't upgrade anything.
Not only CPUs, but also multiple Chipset manufacturers all supporting same Socket 5-7-SS7. Performance delta between worst (some VIA, async cache) and best (TX, Pipelined) chipset/cache configuration was up to straight 50% https://dependency-injection.com/early-pentium-chipsets/ and thats before you picked CPU and graphic card :o Wild times.
I remember consistently having reliability issues with Windows 98 when installed on systems with VIA chipsets, but almost no problems with Intel chipsets. Gigabyte motherboards if it makes a difference, and yes, the chipset drivers were installed.
Yeah, that sucks. Used to be, one could just replace a single component to upgrade one's PC, soon you could no longer just replace the CPU, you needed a new motherboard, which also required new RAM. We lost something there.
Intel Core is an eighth-generation microarchitecture, and the most recent Intel desktop CPUs are 14th gen Core processors. So the current generation is "8.14" as it were; the basic architecture is still more or less the same as it was 15 years ago.
12th gen Core processors raise a question should change in multi-core architecture like bringing in multiple types of cores be considered drastic enough change?
Wikipedia is the best source for this as its confusing unless you deal with it every day. FWIW Raptor Lake (https://en.wikipedia.org/wiki/Raptor_Lake) is Intel's codename for its 13th & 14th generation of Core processors, and the one after will be called Arrow Lake and Meteor Lake (depending on if desktop or mobile).
The next ones are Sierra Forest and Granite Rapids on the server side, Arrow Lake on the desktop and Lunar Lake on the laptop.
And then comes Panther Lake supposedly next year which is both desktop and laptop and Gelsinger admitted betting the company on the 18A process it is using.
The most interesting insight in there is how the former manages to outperform the latter in this specific case due to a pipeline quirk in the FDIV instruction, despite the fact it is a previous generation, in-order design vs a next generation, out-of-order design.
[1] https://arstechnica.com/features/1999/10/rvc/
[1] https://www.amazon.com/Inside-Machine-Introduction-Microproc...
I think the website is also a great design and implementation. Given that it was last updated in 1999 the design is original not a retro creation.
When did Transmeta join the fray?
(Screw the Intel Core(Ultra)<X> rebranding.)
So in that sense, this is a very interesting bit of history that's still relevant today.
Intel actually went back to the P6 µarch after Netburst (Pentium 4) failed to meet expectations. Fortunately, they had continue to improve P6 as a laptop focused processor (Pentium M). Netburst is a very interesting µarch, with a lot of interesting innovations. Some of those ideas (like hyperthreadding, the single physical register file and a simplified uop cache) eventually made their way back to the P6 uarch.
And it's not just historically relevant to Intel. Other CPU vendors started copying the basic layout of the P6 and as now days the high-level views of AMD's Zen µarch and all high-performance AArch64 µarches look remarkably similar to the P6 and its decedents.
With some hindsight available now, does anybody know if there is something to this suspicion? Intel being far less enthusiastic about Itanium than HP did look weird to me. Then again, that was years later when Itanium was actually available and nobody except HP showed any interest in using them.
https://en.wikipedia.org/wiki/Out-of-order_execution
I think the website is also a great design and implementation. Given that it was last updated in 1999 the design is original not a retro creation.
As a result, under heavy load, my PC would crash rather often, leading me to curse audibly until somebody pointed out the power vs fan issue to me and recommended I get a bigger fan. So I did. After that, it ran pretty stable.
Cyrix made a trade of in that CPU, the integer performance was far better than that of a Pentium at the same clock speed, the floating point performance lagged far behind. I got that machine in the summer of 1996, and then all my friends started playing Quake, which made me sad. Playing Quake (let alone Quake II) on that machine was more like staring at a slideshow. A 3dfx card was way outside my budget, unfortunately.
These days sockets are shortlived & each manufacturer has their own. Or cpu's (and even RAM) soldered directly onto a board so you can't upgrade anything.
I remember consistently having reliability issues with Windows 98 when installed on systems with VIA chipsets, but almost no problems with Intel chipsets. Gigabyte motherboards if it makes a difference, and yes, the chipset drivers were installed.
With the i3/i5/i7/i9 naming convention I have lost track Unless i3.1s have essentially the same architecture as i3.xxx newest.
So, if Netburst gen 7; Conroe gen 8; Haswell gen 9; Skylake gen 10.
Also exists separate branch of Bonnell (Atom), which is based on CMOS old p5 core and have totally different from desktop line generations.
And I don't consider MMX and Netburst as separate generations, but as dead end branches. If consider all dead-ends we should be over 20.
AMD have significantly less number of generations, I think Ryzen could be considered something like k-11.
I think upcoming Intel CPUs will be hybrids of Skylake fast cores with Atom (whatever) energy-effective cores.
More detailed explanation on link:
https://news.ycombinator.com/item?id=40108990
https://en.wikipedia.org/wiki/Meteor_Lake
The next ones are Sierra Forest and Granite Rapids on the server side, Arrow Lake on the desktop and Lunar Lake on the laptop.
And then comes Panther Lake supposedly next year which is both desktop and laptop and Gelsinger admitted betting the company on the 18A process it is using.
We shall see.
I think upcoming Intel CPUs will be hybrids of Skylake fast cores with Atom (whatever) energy-effective cores.